Generator for wokwi schematics that implement lookup tables in conjunctive normal form (CNF), i.e. with AND and OR gates

Example Neural Network Accelerator Chip Design

High-Efficiency 16-bit BFloat16 Multiply-Accumulate (MAC) Unit for ML Acceleration. Verified for SkyWater 130nm (TinyTapeout 07). Includes FP32 accumulation and streaming I/O.

WS2812B LED strip driver for TinyQV

Femto: 4-bit CPU submission for TinyTapeout2

RISC-V CPU with an integrated SRAM-based compute-in-memory (CIM) accelerator for performing efficient analog matrix multiplications.

Submission for tt02 - Rotating Dash

RC5 receiver ASIC

xoshiro128++ PRNG peripheral for TinyQV

Very Small Logic Controller (for Tiny Tapeout) - Verilog HDL Projects

VGA flexible video adapter for TinyQV - Crowdsourced Risc-V SoC

TinyTapeout GDS blackbox macro testing